The present invention relates to controlled phase shifters for shifting the phase of a two amplitude levels, periodic input signal, and particularly, where this input signal is a timing clock signal having a phase to be adjusted by the phase shifter apparatus, usually in a feedback loop.
A voltage controlled phase shifter is often required in feedback loops which are used to control the phase of digital system timing clock signals, or the phase of clock signals appearing in analog systems for use in operating analog switches. One known method for doing so involves converting the two amplitude levels clock signal, i.e. square wave of a selected duty cycle, into a corresponding triangular wave by use of an integrator which receives and integrates the two amplitude levels timing clock signal. The output of the integrator is supplied to a comparator at its non-inverting input while a phase control voltage signal is supplied to the inverting input of the comparator. The output of the comparator is connected to an edge-triggered, D-type flip-flop which has its complementary output connected back to the D input to thereby provide a 50% duty cycle phase controlled output signal. This method of providing a voltage control phase shifter requires an input timing clock signal having twice the frequency of the phase controlled output signal and so is limited to a phase shift maximum of approximately 180.degree. maximum. Further, the integrator circuit can cause inaccuracies.